The computer industry is moving toward fast, packetized, serial input/output (I/O) bus architectures, in which computing hosts and peripherals are linked by a switching network, commonly referred to as a switching fabric. A number of architectures of this type have been proposed, culminating in the “InfiniBand™” (IB) architecture, which has been advanced by a consortium led by a group of industry leaders (including Intel, Sun Microsystems, Hewlett Packard, IBM, Compaq, Dell and Microsoft). The IB architecture is described in detail in the InfiniBand Architecture Specification, Release 1.0 (October, 2000), which is incorporated herein by reference. This document is available from the InfiniBand Trade Association.
A host processor (or host) connects to the IB network via a network interface adapter, which is referred to in IB parlance as a host channel adapter (HCA). Typically, the HCA is implemented as a single chip, with connections to the host bus and to the network. Client processes running on the host communicate with the transport layer of the IB fabric by manipulating a transport service instance, known as a “queue pair” (QP), made up of a send work queue and a receive work queue. The IB specification permits the HCA to allocate as many as 16 million (224) Qps, each with a distinct queue pair number (QPN). A given client may open and use multiple QPs simultaneously.
To send and receive communications over the network, the client initiates work requests (WRs), which causes work items, called work queue elements (WQEs), to be placed onto the appropriate queues. The channel adapter then executes the work items, so as to communicate with the corresponding QP of the channel adapter at the other end of the link. After it has finished servicing a WQE, the HCA writes a completion queue element (CQE) to a completion queue, to be read by the client.
The QP that initiates a particular operation, i.e. injects a message into the fabric, is referred to as the requester, while the QP that receives the message is referred to as the responder. An IB operation is defined to include a request message generated by the requester and, as appropriate, its corresponding response generated by the responder. (Not all request messages have responses.) Each message consists of one or more IB packets. Typically, a given HCA will serve simultaneously both as a requester, transmitting requests and receiving responses on behalf of local clients, and as a responder, receiving requests from other channel adapters and returning responses accordingly.
Each QP is configured for a certain transport service type, based on how the requesting and responding QPs interact. Both the source and destination QPs must be configured for the same service type. The IB specification defines four service types: reliable connection, unreliable connection, reliable datagram and unreliable datagram. The reliable services require that the responder acknowledge all messages that it receives from the requester.
Request messages include, inter alia, remote direct memory access (RDMA) write and send requests, both of which cause the responder to write data to a memory address at its own end of the link, and RDMA read requests, which cause the responder to read data from a memory address and return it to the requester. Atomic read-modify-write requests can cause the responder both to write data to its own memory and to return data to the requester. Most response messages consist of a single acknowledgment packet, except for RDMA read responses, which may contain up to 231 bytes of data, depending on the data range specified in the request.
To generate an outgoing message or to service an incoming message on a given QP, the HCA uses context information pertaining to the QP. The QP context is created in a memory accessible to the HCA by the client process that sets up the QP. The client configures the QP context with fixed information such as the destination address (referred to as the LID—local identifier) for connected services, negotiated operating limits, service level and keys for access control. Typically, a variable part of the context, such as the current packet sequence number (PSN) and information regarding the WQE being serviced by the QP, is subsequently updated by the HCA as it sends and receives messages. This information can be maintained in a database record of fixed size for each QP.
In addition, in order to track the completion of message operations, the HCA typically keeps a record of all outstanding request messages on each QP, until the corresponding operations have been completed. For unreliable services, the message operation is considered complete as soon as the message has been sent and a CQE has been written to the host memory. For reliable services, the message operation remains outstanding until the HCA has received an acknowledgment from the responder. For an active QP, configured for reliable service and operating under congested fabric conditions, a large number of message operations may be outstanding at the same time.
Therefore, in order to hold the outstanding message information along with the other QP context data, the HCA must allocate a substantial volume of reserve memory for each QP. For efficient operation, the memory used to hold the outstanding message information should be on the HCA chip itself. It is also desirable the HCA be able to support a large number of open QPs simultaneously. At any given time, however, only a minority of these QPs will typically have messages outstanding. Thus, it is likely that most of the time, the costly on-chip memory that is allocated to each QP to hold outstanding message information will be underused.